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Merge pull request #4440 from arpadpanyik-arm/convert_seq_sve2
AArch64: Add SVE2 path for convertSequences_noRepcodes
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@ -7390,6 +7390,155 @@ size_t convertSequences_noRepcodes(SeqDef* dstSeqs, const ZSTD_Sequence* inSeqs,
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* but since this implementation is targeting modern systems (>= Sapphire Rapid),
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* it's not useful to develop and maintain code for older pre-AVX2 platforms */
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#elif defined(ZSTD_ARCH_ARM_SVE2)
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/*
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* Checks if any active element in a signed 8-bit integer vector is greater
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* than zero.
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*
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* @param g Governing predicate selecting active lanes.
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* @param a Input vector of signed 8-bit integers.
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*
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* @return True if any active element in `a` is > 0, false otherwise.
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*/
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FORCE_INLINE_TEMPLATE int cmpgtz_any_s8(svbool_t g, svint8_t a)
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{
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svbool_t ptest = svcmpgt_n_s8(g, a, 0);
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return svptest_any(ptest, ptest);
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}
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size_t convertSequences_noRepcodes(
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SeqDef* dstSeqs,
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const ZSTD_Sequence* inSeqs,
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size_t nbSequences)
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{
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/* Process the input with `8 * VL / element` lanes. */
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const size_t lanes = 8 * svcntb() / sizeof(ZSTD_Sequence);
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size_t longLen = 0;
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size_t n = 0;
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/* SVE permutation depends on the specific definition of target structures. */
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ZSTD_STATIC_ASSERT(sizeof(ZSTD_Sequence) == 16);
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ZSTD_STATIC_ASSERT(offsetof(ZSTD_Sequence, offset) == 0);
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ZSTD_STATIC_ASSERT(offsetof(ZSTD_Sequence, litLength) == 4);
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ZSTD_STATIC_ASSERT(offsetof(ZSTD_Sequence, matchLength) == 8);
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ZSTD_STATIC_ASSERT(sizeof(SeqDef) == 8);
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ZSTD_STATIC_ASSERT(offsetof(SeqDef, offBase) == 0);
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ZSTD_STATIC_ASSERT(offsetof(SeqDef, litLength) == 4);
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ZSTD_STATIC_ASSERT(offsetof(SeqDef, mlBase) == 6);
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if (nbSequences >= lanes) {
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const svbool_t ptrue = svptrue_b8();
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/* 16-bit of {ZSTD_REP_NUM, 0, -MINMATCH, 0} extended to 32-bit lanes. */
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const svuint32_t vaddition = svreinterpret_u32(
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svunpklo_s32(svreinterpret_s16(svdup_n_u64(ZSTD_REP_NUM | (((U64)(U16)-MINMATCH) << 32)))));
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/* For permutation of 16-bit units: 0, 1, 2, 4, 8, 9, 10, 12, ... */
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const svuint16_t vmask = svreinterpret_u16(
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svindex_u64(0x0004000200010000, 0x0008000800080008));
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/* Upper bytes of `litLength` and `matchLength` will be packed into the
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* middle of overflow check vector. */
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const svbool_t pmid = svcmpne_n_u8(
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ptrue, svreinterpret_u8(svdup_n_u64(0x0000FFFFFFFF0000)), 0);
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do {
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/* Load `lanes` number of `ZSTD_Sequence` into 8 vectors. */
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const svuint32_t vin0 = svld1_vnum_u32(ptrue, &inSeqs[n].offset, 0);
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const svuint32_t vin1 = svld1_vnum_u32(ptrue, &inSeqs[n].offset, 1);
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const svuint32_t vin2 = svld1_vnum_u32(ptrue, &inSeqs[n].offset, 2);
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const svuint32_t vin3 = svld1_vnum_u32(ptrue, &inSeqs[n].offset, 3);
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const svuint32_t vin4 = svld1_vnum_u32(ptrue, &inSeqs[n].offset, 4);
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const svuint32_t vin5 = svld1_vnum_u32(ptrue, &inSeqs[n].offset, 5);
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const svuint32_t vin6 = svld1_vnum_u32(ptrue, &inSeqs[n].offset, 6);
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const svuint32_t vin7 = svld1_vnum_u32(ptrue, &inSeqs[n].offset, 7);
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/* Add {ZSTD_REP_NUM, 0, -MINMATCH, 0} to each structures. */
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const svuint16x2_t vadd01 = svcreate2_u16(
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svreinterpret_u16(svadd_u32_x(ptrue, vin0, vaddition)),
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svreinterpret_u16(svadd_u32_x(ptrue, vin1, vaddition)));
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const svuint16x2_t vadd23 = svcreate2_u16(
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svreinterpret_u16(svadd_u32_x(ptrue, vin2, vaddition)),
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svreinterpret_u16(svadd_u32_x(ptrue, vin3, vaddition)));
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const svuint16x2_t vadd45 = svcreate2_u16(
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svreinterpret_u16(svadd_u32_x(ptrue, vin4, vaddition)),
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svreinterpret_u16(svadd_u32_x(ptrue, vin5, vaddition)));
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const svuint16x2_t vadd67 = svcreate2_u16(
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svreinterpret_u16(svadd_u32_x(ptrue, vin6, vaddition)),
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svreinterpret_u16(svadd_u32_x(ptrue, vin7, vaddition)));
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/* Shuffle and pack bytes so each vector contains SeqDef structures. */
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const svuint16_t vout01 = svtbl2_u16(vadd01, vmask);
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const svuint16_t vout23 = svtbl2_u16(vadd23, vmask);
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const svuint16_t vout45 = svtbl2_u16(vadd45, vmask);
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const svuint16_t vout67 = svtbl2_u16(vadd67, vmask);
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/* Pack the upper 16-bits of 32-bit lanes for overflow check. */
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const svuint16_t voverflow01 = svuzp2_u16(svget2_u16(vadd01, 0),
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svget2_u16(vadd01, 1));
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const svuint16_t voverflow23 = svuzp2_u16(svget2_u16(vadd23, 0),
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svget2_u16(vadd23, 1));
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const svuint16_t voverflow45 = svuzp2_u16(svget2_u16(vadd45, 0),
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svget2_u16(vadd45, 1));
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const svuint16_t voverflow67 = svuzp2_u16(svget2_u16(vadd67, 0),
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svget2_u16(vadd67, 1));
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/* We don't need the whole 16 bits of the overflow part. Only 1 bit
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* is needed, so we pack tightly and merge multiple vectors to be
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* able to use a single comparison to handle the overflow case.
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* However, we also need to handle the possible negative values of
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* matchLength parts, so we use signed comparison later. */
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const svint8_t voverflow =
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svmax_s8_x(pmid,
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svtrn1_s8(svreinterpret_s8(voverflow01),
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svreinterpret_s8(voverflow23)),
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svtrn1_s8(svreinterpret_s8(voverflow45),
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svreinterpret_s8(voverflow67)));
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/* Store `lanes` number of `SeqDef` structures from 4 vectors. */
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svst1_vnum_u32(ptrue, &dstSeqs[n].offBase, 0, svreinterpret_u32(vout01));
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svst1_vnum_u32(ptrue, &dstSeqs[n].offBase, 1, svreinterpret_u32(vout23));
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svst1_vnum_u32(ptrue, &dstSeqs[n].offBase, 2, svreinterpret_u32(vout45));
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svst1_vnum_u32(ptrue, &dstSeqs[n].offBase, 3, svreinterpret_u32(vout67));
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/* Check if any enabled lanes of the overflow vector is larger than
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* zero, only one such may happen. */
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if (UNLIKELY(cmpgtz_any_s8(pmid, voverflow))) {
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/* Scalar search for long match is needed because we merged
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* multiple overflow bytes with `max`. */
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size_t i;
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for (i = n; i < n + lanes; i++) {
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if (inSeqs[i].matchLength > 65535 + MINMATCH) {
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assert(longLen == 0);
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longLen = i + 1;
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}
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if (inSeqs[i].litLength > 65535) {
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assert(longLen == 0);
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longLen = i + nbSequences + 1;
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}
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}
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}
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n += lanes;
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} while(n <= nbSequences - lanes);
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}
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/* Handle remaining elements. */
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for (; n < nbSequences; n++) {
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dstSeqs[n].offBase = OFFSET_TO_OFFBASE(inSeqs[n].offset);
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dstSeqs[n].litLength = (U16)inSeqs[n].litLength;
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dstSeqs[n].mlBase = (U16)(inSeqs[n].matchLength - MINMATCH);
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/* Check for long length > 65535. */
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if (UNLIKELY(inSeqs[n].matchLength > 65535 + MINMATCH)) {
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assert(longLen == 0);
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longLen = n + 1;
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}
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if (UNLIKELY(inSeqs[n].litLength > 65535)) {
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assert(longLen == 0);
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longLen = n + nbSequences + 1;
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}
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}
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return longLen;
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}
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#elif defined(ZSTD_ARCH_ARM_NEON) && (defined(__aarch64__) || defined(_M_ARM64))
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size_t convertSequences_noRepcodes(
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