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7842f86142
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7842f86142 | ||
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347cf45277 |
@ -3730,6 +3730,8 @@ XXH_PUBLIC_API XXH64_hash_t XXH64_hashFromCanonical(XXH_NOESCAPE const XXH64_can
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# include <immintrin.h>
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# include <immintrin.h>
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# elif defined(__SSE2__)
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# elif defined(__SSE2__)
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# include <emmintrin.h>
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# include <emmintrin.h>
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# elif defined(__riscv_vector)
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# include <riscv_vector.h>
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# endif
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# endif
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#endif
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#endif
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@ -3852,6 +3854,7 @@ enum XXH_VECTOR_TYPE /* fake enum */ {
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*/
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*/
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XXH_VSX = 5, /*!< VSX and ZVector for POWER8/z13 (64-bit) */
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XXH_VSX = 5, /*!< VSX and ZVector for POWER8/z13 (64-bit) */
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XXH_SVE = 6, /*!< SVE for some ARMv8-A and ARMv9-A */
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XXH_SVE = 6, /*!< SVE for some ARMv8-A and ARMv9-A */
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XXH_RVV = 7, /*!< RVV (RISC-V Vector) for RISC-V */
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};
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};
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/*!
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/*!
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* @ingroup tuning
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* @ingroup tuning
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@ -3874,6 +3877,7 @@ enum XXH_VECTOR_TYPE /* fake enum */ {
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# define XXH_NEON 4
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# define XXH_NEON 4
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# define XXH_VSX 5
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# define XXH_VSX 5
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# define XXH_SVE 6
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# define XXH_SVE 6
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# define XXH_RVV 7
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#endif
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#endif
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#ifndef XXH_VECTOR /* can be defined on command line */
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#ifndef XXH_VECTOR /* can be defined on command line */
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@ -3898,6 +3902,8 @@ enum XXH_VECTOR_TYPE /* fake enum */ {
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|| (defined(__s390x__) && defined(__VEC__)) \
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|| (defined(__s390x__) && defined(__VEC__)) \
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&& defined(__GNUC__) /* TODO: IBM XL */
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&& defined(__GNUC__) /* TODO: IBM XL */
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# define XXH_VECTOR XXH_VSX
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# define XXH_VECTOR XXH_VSX
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# elif defined(__riscv_vector)
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# define XXH_VECTOR XXH_RVV
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# else
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# else
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# define XXH_VECTOR XXH_SCALAR
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# define XXH_VECTOR XXH_SCALAR
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# endif
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# endif
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@ -3935,6 +3941,8 @@ enum XXH_VECTOR_TYPE /* fake enum */ {
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# define XXH_ACC_ALIGN 64
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# define XXH_ACC_ALIGN 64
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# elif XXH_VECTOR == XXH_SVE /* sve */
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# elif XXH_VECTOR == XXH_SVE /* sve */
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# define XXH_ACC_ALIGN 64
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# define XXH_ACC_ALIGN 64
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# elif XXH_VECTOR == XXH_RVV /* rvv */
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# define XXH_ACC_ALIGN 64 /* could be 8, but 64 may be faster */
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# endif
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# endif
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#endif
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#endif
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@ -3943,6 +3951,8 @@ enum XXH_VECTOR_TYPE /* fake enum */ {
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# define XXH_SEC_ALIGN XXH_ACC_ALIGN
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# define XXH_SEC_ALIGN XXH_ACC_ALIGN
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#elif XXH_VECTOR == XXH_SVE
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#elif XXH_VECTOR == XXH_SVE
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# define XXH_SEC_ALIGN XXH_ACC_ALIGN
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# define XXH_SEC_ALIGN XXH_ACC_ALIGN
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#elif XXH_VECTOR == XXH_RVV
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# define XXH_SEC_ALIGN XXH_ACC_ALIGN
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#else
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#else
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# define XXH_SEC_ALIGN 8
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# define XXH_SEC_ALIGN 8
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#endif
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#endif
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@ -5601,6 +5611,132 @@ XXH3_accumulate_sve(xxh_u64* XXH_RESTRICT acc,
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#endif
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#endif
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#if (XXH_VECTOR == XXH_RVV)
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#define XXH_CONCAT2(X, Y) X ## Y
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#define XXH_CONCAT(X, Y) XXH_CONCAT2(X, Y)
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#if ((defined(__GNUC__) && !defined(__clang__) && __GNUC__ < 13) || \
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(defined(__clang__) && __clang_major__ < 16))
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#define XXH_RVOP(op) op
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#define XXH_RVCAST(op) XXH_CONCAT(vreinterpret_v_, op)
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#else
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#define XXH_RVOP(op) XXH_CONCAT(__riscv_, op)
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#define XXH_RVCAST(op) XXH_CONCAT(__riscv_vreinterpret_v_, op)
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#endif
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XXH_FORCE_INLINE void
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XXH3_accumulate_512_rvv( void* XXH_RESTRICT acc,
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const void* XXH_RESTRICT input,
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const void* XXH_RESTRICT secret)
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{
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XXH_ASSERT((((size_t)acc) & 63) == 0);
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{
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// Try to set vector lenght to 512 bits.
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// If this length is unavailable, then maximum available will be used
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size_t vl = XXH_RVOP(vsetvl_e64m2)(8);
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uint64_t* xacc = (uint64_t*) acc;
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const uint64_t* xinput = (const uint64_t*) input;
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const uint64_t* xsecret = (const uint64_t*) secret;
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static const uint64_t swap_mask[16] = {1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14};
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vuint64m2_t xswap_mask = XXH_RVOP(vle64_v_u64m2)(swap_mask, vl);
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size_t i;
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for (i = 0; i < XXH_STRIPE_LEN/8; i += vl) {
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/* data_vec = xinput[i]; */
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vuint64m2_t data_vec = XXH_RVCAST(u8m2_u64m2)(XXH_RVOP(vle8_v_u8m2)((const uint8_t*)(xinput + i), vl * 8));
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/* key_vec = xsecret[i]; */
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vuint64m2_t key_vec = XXH_RVCAST(u8m2_u64m2)(XXH_RVOP(vle8_v_u8m2)((const uint8_t*)(xsecret + i), vl * 8));
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/* acc_vec = xacc[i]; */
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vuint64m2_t acc_vec = XXH_RVOP(vle64_v_u64m2)(xacc + i, vl);
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/* data_key = data_vec ^ key_vec; */
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vuint64m2_t data_key = XXH_RVOP(vxor_vv_u64m2)(data_vec, key_vec, vl);
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/* data_key_hi = data_key >> 32; */
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vuint64m2_t data_key_hi = XXH_RVOP(vsrl_vx_u64m2)(data_key, 32, vl);
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/* data_key_lo = data_key & 0xffffffff; */
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vuint64m2_t data_key_lo = XXH_RVOP(vand_vx_u64m2)(data_key, 0xffffffff, vl);
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/* swap high and low halves */
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vuint64m2_t data_swap = XXH_RVOP(vrgather_vv_u64m2)(data_vec, xswap_mask, vl);
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/* acc_vec += data_key_lo * data_key_hi; */
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acc_vec = XXH_RVOP(vmacc_vv_u64m2)(acc_vec, data_key_lo, data_key_hi, vl);
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/* acc_vec += data_swap; */
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acc_vec = XXH_RVOP(vadd_vv_u64m2)(acc_vec, data_swap, vl);
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/* xacc[i] = acc_vec; */
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XXH_RVOP(vse64_v_u64m2)(xacc + i, acc_vec, vl);
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}
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}
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}
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XXH_FORCE_INLINE XXH3_ACCUMULATE_TEMPLATE(rvv)
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XXH_FORCE_INLINE void
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XXH3_scrambleAcc_rvv(void* XXH_RESTRICT acc, const void* XXH_RESTRICT secret)
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{
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XXH_ASSERT((((size_t)acc) & 15) == 0);
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{
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size_t count = XXH_STRIPE_LEN/8;
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uint64_t* xacc = (uint64_t*)acc;
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const uint8_t* xsecret = (const uint8_t *)secret;
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size_t vl;
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for (; count > 0; count -= vl, xacc += vl, xsecret += vl*8) {
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vl = XXH_RVOP(vsetvl_e64m2)(count);
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{
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/* key_vec = xsecret[i]; */
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vuint64m2_t key_vec = XXH_RVCAST(u8m2_u64m2)(XXH_RVOP(vle8_v_u8m2)(xsecret, vl*8));
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/* acc_vec = xacc[i]; */
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vuint64m2_t acc_vec = XXH_RVOP(vle64_v_u64m2)(xacc, vl);
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/* acc_vec ^= acc_vec >> 47; */
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vuint64m2_t vsrl = XXH_RVOP(vsrl_vx_u64m2)(acc_vec, 47, vl);
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acc_vec = XXH_RVOP(vxor_vv_u64m2)(acc_vec, vsrl, vl);
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/* acc_vec ^= key_vec; */
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acc_vec = XXH_RVOP(vxor_vv_u64m2)(acc_vec, key_vec, vl);
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/* acc_vec *= XXH_PRIME32_1; */
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acc_vec = XXH_RVOP(vmul_vx_u64m2)(acc_vec, XXH_PRIME32_1, vl);
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/* xacc[i] *= acc_vec; */
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XXH_RVOP(vse64_v_u64m2)(xacc, acc_vec, vl);
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}
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}
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}
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}
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XXH_FORCE_INLINE void
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XXH3_initCustomSecret_rvv(void* XXH_RESTRICT customSecret, xxh_u64 seed64)
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{
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XXH_STATIC_ASSERT(XXH_SEC_ALIGN >= 8);
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XXH_ASSERT(((size_t)customSecret & 7) == 0);
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(void)(&XXH_writeLE64);
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{
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size_t count = XXH_SECRET_DEFAULT_SIZE/8;
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size_t vl;
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size_t VLMAX = XXH_RVOP(vsetvlmax_e64m2)();
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int64_t* cSecret = (int64_t*)customSecret;
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const int64_t* kSecret = (const int64_t*)(const void*)XXH3_kSecret;
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#if __riscv_v_intrinsic >= 1000000
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// ratified v1.0 intrinics version
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vbool32_t mneg = XXH_RVCAST(u8m1_b32)(
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XXH_RVOP(vmv_v_x_u8m1)(0xaa, XXH_RVOP(vsetvlmax_e8m1)()));
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#else
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// support pre-ratification intrinics, which lack mask to vector casts
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size_t vlmax = XXH_RVOP(vsetvlmax_e8m1)();
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vbool32_t mneg = XXH_RVOP(vmseq_vx_u8mf4_b32)(
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XXH_RVOP(vand_vx_u8mf4)(
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XXH_RVOP(vid_v_u8mf4)(vlmax), 1, vlmax), 1, vlmax);
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#endif
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vint64m2_t seed = XXH_RVOP(vmv_v_x_i64m2)((int64_t)seed64, VLMAX);
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seed = XXH_RVOP(vneg_v_i64m2_mu)(mneg, seed, seed, VLMAX);
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for (; count > 0; count -= vl, cSecret += vl, kSecret += vl) {
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/* make sure vl=VLMAX until last iteration */
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vl = XXH_RVOP(vsetvl_e64m2)(count < VLMAX ? count : VLMAX);
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{
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vint64m2_t src = XXH_RVOP(vle64_v_i64m2)(kSecret, vl);
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vint64m2_t res = XXH_RVOP(vadd_vv_i64m2)(src, seed, vl);
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XXH_RVOP(vse64_v_i64m2)(cSecret, res, vl);
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}
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}
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}
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}
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#endif
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/* scalar variants - universal */
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/* scalar variants - universal */
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#if defined(__aarch64__) && (defined(__GNUC__) || defined(__clang__))
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#if defined(__aarch64__) && (defined(__GNUC__) || defined(__clang__))
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@ -5831,6 +5967,12 @@ typedef void (*XXH3_f_initCustomSecret)(void* XXH_RESTRICT, xxh_u64);
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#define XXH3_scrambleAcc XXH3_scrambleAcc_scalar
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#define XXH3_scrambleAcc XXH3_scrambleAcc_scalar
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#define XXH3_initCustomSecret XXH3_initCustomSecret_scalar
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#define XXH3_initCustomSecret XXH3_initCustomSecret_scalar
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#elif (XXH_VECTOR == XXH_RVV)
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#define XXH3_accumulate_512 XXH3_accumulate_512_rvv
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#define XXH3_accumulate XXH3_accumulate_rvv
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#define XXH3_scrambleAcc XXH3_scrambleAcc_rvv
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#define XXH3_initCustomSecret XXH3_initCustomSecret_rvv
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#else /* scalar */
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#else /* scalar */
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#define XXH3_accumulate_512 XXH3_accumulate_512_scalar
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#define XXH3_accumulate_512 XXH3_accumulate_512_scalar
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