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Apple's assembler likes the inlined TAS syntax too, so no reason to

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maintain a separate out-of-line version of PPC tas() anymore.
Also fix S_UNLOCK for __powerpc64__ platforms.
This commit is contained in:
Tom Lane 2003-04-20 21:54:34 +00:00
parent b5d0051ecf
commit f9ba0a7fe5
2 changed files with 13 additions and 41 deletions
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35
src/backend/storage/lmgr/s_lock.c
View File

@ -9,7 +9,7 @@
*
*
* IDENTIFICATION
* $Header: /cvsroot/pgsql/src/backend/storage/lmgr/s_lock.c,v 1.10 2002/11/10 00:33:43 momjian Exp $
* $Header: /cvsroot/pgsql/src/backend/storage/lmgr/s_lock.c,v 1.11 2003/04/20 21:54:34 tgl Exp $
*
*-------------------------------------------------------------------------
*/
@ -111,39 +111,6 @@ _success: \n\
}
#endif /* __m68k__ */
#if defined(__APPLE__) && defined(__ppc__)
/* used in darwin. */
/* We key off __APPLE__ here because this function differs from
* the LinuxPPC implementation only in compiler syntax.
*
* NOTE: per the Enhanced PowerPC Architecture manual, v1.0 dated 7-May-2002,
* an isync is a sufficient synchronization barrier after a lwarx/stwcx loop.
*/
static void
tas_dummy()
{
__asm__ __volatile__(
"\
.globl tas \n\
.globl _tas \n\
_tas: \n\
tas: \n\
lwarx r5,0,r3 \n\
cmpwi r5,0 \n\
bne fail \n\
addi r5,r5,1 \n\
stwcx. r5,0,r3 \n\
beq success \n\
fail: li r3,1 \n\
blr \n\
success: \n\
isync \n\
li r3,0 \n\
blr \n\
");
}
#endif /* __APPLE__ && __ppc__ */
#if defined(__mips__) && !defined(__sgi)
static void
tas_dummy()

19
src/include/storage/s_lock.h
View File

@ -63,7 +63,7 @@
* Portions Copyright (c) 1996-2002, PostgreSQL Global Development Group
* Portions Copyright (c) 1994, Regents of the University of California
*
* $Id: s_lock.h,v 1.105 2003/04/04 06:57:39 tgl Exp $
* $Id: s_lock.h,v 1.106 2003/04/20 21:54:34 tgl Exp $
*
*-------------------------------------------------------------------------
*/
@ -221,7 +221,12 @@ tas(volatile slock_t *lock)
#endif /* __sparc__ */
#if defined(__powerpc__) || defined(__powerpc64__)
#if defined(__ppc__) || defined(__powerpc__) || defined(__powerpc64__)
#define TAS(lock) tas(lock)
/*
* NOTE: per the Enhanced PowerPC Architecture manual, v1.0 dated 7-May-2002,
* an isync is a sufficient synchronization barrier after a lwarx/stwcx loop.
*/
static __inline__ int
tas(volatile slock_t *lock)
{
@ -248,7 +253,8 @@ tas(volatile slock_t *lock)
);
return _res;
}
#endif
#endif /* powerpc */
#if defined(__mc68000__) && defined(__linux__)
@ -273,10 +279,9 @@ tas(volatile slock_t *lock)
#endif /* defined(__mc68000__) && defined(__linux__) */
#if defined(__ppc__) || defined(__powerpc__)
#if defined(__ppc__) || defined(__powerpc__) || defined(__powerpc64__)
/*
* We currently use out-of-line assembler for TAS on PowerPC; see s_lock.c.
* S_UNLOCK is almost standard but requires a "sync" instruction.
* PowerPC S_UNLOCK is almost standard but requires a "sync" instruction.
*/
#define S_UNLOCK(lock) \
do \
@ -285,7 +290,7 @@ do \
*((volatile slock_t *) (lock)) = 0; \
} while (0)
#endif /* defined(__ppc__) || defined(__powerpc__) */
#endif /* powerpc */
#if defined(NEED_VAX_TAS_ASM)